HiRep
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SIMD_vector_hirep.h
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#ifndef SIMD_VECTOR_HIREP_H
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#define SIMD_VECTOR_HIREP_H
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#ifdef SIMD_VECTOR_HIREP
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#if (NF == 3) || (NG == 3)
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#include "
IO/logger.h
"
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typedef
double
suNg_vector_V __attribute__((vector_size(2 * NG *
sizeof
(
double
))));
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#define _alt_sign_vector ((suNg_vector_V){ -1, +1, -1, +1, -1, +1 })
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#define _conj_sign_vector ((suNg_vector_V){ +1, -1, +1, -1, +1, -1 })
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typedef
struct
suNg_V {
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suNg_vector_V c[NG];
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} suNg_V;
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#define _mul_add(a, b, c) ((a) * (b) + (c))
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#define _decompose_suNg_vector_V(reV, imV, inputV) \
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const suNg_vector_V(reV) = __builtin_shufflevector((inputV), (inputV), 0, 0, 2, 2, 4, 4); \
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const suNg_vector_V(imV) = __builtin_shufflevector((inputV), (inputV), 1, 1, 3, 3, 5, 5)
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#define _re_suNg_vector_V(inputV) __builtin_shufflevector((inputV), (inputV), 0, 0, 2, 2, 4, 4)
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#define _im_suNg_vector_V(inputV) __builtin_shufflevector((inputV), (inputV), 1, 1, 3, 3, 5, 5)
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#define _select_suNg_vector_V(inputV, i, j, sl, isl) \
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sl = __builtin_shufflevector((inputV), (inputV), i, j, i, j, i, j); \
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Isl = _conj_sign_vector * __builtin_shufflevector((inputV), (inputV), j, i, j, i, j, i)
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#define _shuffle_suNg_vector_V(resV, inputV) \
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const suNg_vector_V(resV) = __builtin_shufflevector((inputV), (inputV), 1, 0, 3, 2, 5, 4);
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#define _alt_mul(U, V) ((_alt_sign_vector * U) * V)
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#define _vector_reduce(res, V1, V2, V3) \
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do { \
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suNg_vector_V C1 = __builtin_shufflevector((V1), (V2), 0, 1, 6, 7, -1, -1); \
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C1[4] = (V3)[0]; \
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C1[5] = (V3)[1]; \
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suNg_vector_V C2 = __builtin_shufflevector((V1), (V2), 2, 3, 8, 9, -1, -1); \
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C2[4] = (V3)[2]; \
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C2[5] = (V3)[3]; \
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suNg_vector_V C3 = __builtin_shufflevector((V1), (V2), 4, 5, 10, 11, -1, -1); \
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C3[4] = (V3)[4]; \
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C3[5] = (V3)[5]; \
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res = C1 + C2 + C3; \
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} while (0)
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#define _prod_V(res, reU, imU, V, invV) suNg_vector_V(res) = _mul_add(reU, V, _alt_mul(imU, invV))
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#define _prod_dag_V(res, U, V, IV) suNg_vector_V(res) = _mul_add(_re_suNg_vector_V(U), V, _im_suNg_vector_V(U) * IV)
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#define _MVM_3x3C_SIMD_VEC(r, u, s) \
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do { \
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const suNg_vector_V s_V = *(suNg_vector_V *)(&s); \
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suNg_vector_V *r_V = (suNg_vector_V *)(&r); \
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const suNg_vector_V u_c0 = *(suNg_vector_V *)&((u).c[0]); \
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const suNg_vector_V u_c1 = *(suNg_vector_V *)&((u).c[3]); \
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const suNg_vector_V u_c2 = *(suNg_vector_V *)&((u).c[6]); \
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_decompose_suNg_vector_V(reS, imS, s_V); \
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_shuffle_suNg_vector_V(invC0, u_c0); \
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_prod_V(r1, reS, imS, u_c0, invC0); \
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_shuffle_suNg_vector_V(invC1, u_c1); \
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_prod_V(r2, reS, imS, u_c1, invC1); \
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_shuffle_suNg_vector_V(invC2, u_c2); \
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_prod_V(r3, reS, imS, u_c2, invC2); \
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_vector_reduce(*r_V, r1, r2, r3); \
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} while (0)
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#define _MTVM_3x3C_SIMD_VEC(r, u, s) \
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do { \
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const suNg_vector_V s_V = *(suNg_vector_V *)(&s); \
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suNg_vector_V *r_V = (suNg_vector_V *)(&r); \
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const suNg_vector_V u_c0 = *(suNg_vector_V *)&((u).c[0]); \
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const suNg_vector_V u_c1 = *(suNg_vector_V *)&((u).c[3]); \
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const suNg_vector_V u_c2 = *(suNg_vector_V *)&((u).c[6]); \
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suNg_vector_V(sl); \
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suNg_vector_V(Isl); \
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_select_suNg_vector_V(s_V, 0, 1, sl, isl); \
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_prod_dag_V(r1, (u_c0), sl, Isl); \
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_select_suNg_vector_V(s_V, 2, 3, sl, isl); \
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_prod_dag_V(r2, (u_c1), sl, Isl); \
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_select_suNg_vector_V(s_V, 4, 5, sl, isl); \
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_prod_dag_V(r3, (u_c2), sl, Isl); \
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*r_V = r1 + r2 + r3; \
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} while (0)
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#define _double_MVM_3x3C_SIMD_VEC(r1, r2, u, s1, s2) \
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do { \
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const suNg_vector_V s1_V = *(suNg_vector_V *)(&s1); \
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const suNg_vector_V s2_V = *(suNg_vector_V *)(&s2); \
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suNg_vector_V *r1_V = (suNg_vector_V *)(&r1); \
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suNg_vector_V *r2_V = (suNg_vector_V *)(&r2); \
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const suNg_vector_V u_c0 = *(suNg_vector_V *)&((u).c[0]); \
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const suNg_vector_V u_c1 = *(suNg_vector_V *)&((u).c[3]); \
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const suNg_vector_V u_c2 = *(suNg_vector_V *)&((u).c[6]); \
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_decompose_suNg_vector_V(reS1, imS1, (s1_V)); \
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_decompose_suNg_vector_V(reS2, imS2, (s2_V)); \
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_shuffle_suNg_vector_V(invC0, (u_c0)); \
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_prod_V(r11, reS1, imS1, (u_c0), invC0); \
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_prod_V(r21, reS2, imS2, (u_c0), invC0); \
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_shuffle_suNg_vector_V(invC1, (u_c1)); \
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_prod_V(r12, reS1, imS1, (u_c1), invC1); \
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_prod_V(r22, reS2, imS2, (u_c1), invC1); \
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_shuffle_suNg_vector_V(invC2, (u_c2)); \
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_prod_V(r13, reS1, imS1, (u_c2), invC2); \
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_prod_V(r23, reS2, imS2, (u_c2), invC2); \
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_vector_reduce(*r1_V, r11, r12, r13); \
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_vector_reduce(*r2_V, r21, r22, r23); \
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} while (0)
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#define _double_MTVM_3x3C_SIMD_VEC(r1, r2, u, s1, s2) \
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do { \
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const suNg_vector_V s1_V = *(suNg_vector_V *)(&s1); \
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const suNg_vector_V s2_V = *(suNg_vector_V *)(&s2); \
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suNg_vector_V *r1_V = (suNg_vector_V *)(&r1); \
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suNg_vector_V *r2_V = (suNg_vector_V *)(&r2); \
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const suNg_vector_V u_c0 = *(suNg_vector_V *)&((u).c[0]); \
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const suNg_vector_V u_c1 = *(suNg_vector_V *)&((u).c[3]); \
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const suNg_vector_V u_c2 = *(suNg_vector_V *)&((u).c[6]); \
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suNg_vector_V(sl); \
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suNg_vector_V(Isl); \
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_select_suNg_vector_V(s1_V, 0, 1, sl, isl); \
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_prod_dag_V(r11, (u_c0), sl, Isl); \
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_select_suNg_vector_V(s2_V, 0, 1, sl, isl); \
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_prod_dag_V(r21, (u_c0), sl, Isl); \
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_select_suNg_vector_V(s1_V, 2, 3, sl, isl); \
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_prod_dag_V(r12, (u_c1), sl, Isl); \
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_select_suNg_vector_V(s2_V, 2, 3, sl, isl); \
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_prod_dag_V(r22, (u_c1), sl, Isl); \
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_select_suNg_vector_V(s1_V, 4, 5, sl, isl); \
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_prod_dag_V(r13, (u_c2), sl, Isl); \
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_select_suNg_vector_V(s2_V, 4, 5, sl, isl); \
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_prod_dag_V(r23, (u_c2), sl, Isl); \
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*r1_V = r11 + r12 + r13; \
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*r2_V = r21 + r22 + r23; \
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} while (0)
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#endif
//(NF == 3) || (NG == 3)
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#if (NF == 3) && !defined(REPR_IS_REAL)
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// clang-format off
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#undef _suNf_multiply
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#define _suNf_multiply(mc, mu, mp) \
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_Generic((mc), \
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suNf_vector : ({ _MVM_3x3C_SIMD_VEC((mc), (mu), (mp)); }), \
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default : ({ _suNf_multiply_default(mc, mu, mp); }))
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#undef _suNf_inverse_multiply
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#define _suNf_inverse_multiply(mc, mu, mp) \
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_Generic((mc), \
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suNf_vector : ({ _MTVM_3x3C_SIMD_VEC((mc), (mu), (mp)); }), \
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default : ({ _suNf_inverse_multiply_default(mc, mu, mp); }))
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#undef _suNf_double_multiply
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#define _suNf_double_multiply(mc, mc2, mu, mp, mp2) \
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_Generic((mc), \
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suNf_vector : ({ _double_MVM_3x3C_SIMD_VEC((mc), (mc2), (mu), (mp), (mp2)); }),\
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default : ({ _suNf_double_multiply_default(mc, mc2, mu, mp, mp2); }))
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#undef _suNf_double_inverse_multiply
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#define _suNf_double_inverse_multiply(mc, mc2, mu, mp, mp2) \
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_Generic((mc), \
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suNf_vector : ({ _double_MTVM_3x3C_SIMD_VEC((mc), (mc2), (mu), (mp), (mp2)); }),\
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default : ({ _suNf_double_inverse_multiply_default(mc, mc2, mu, mp, mp2); }))
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#endif
//(NF == 3) && !defined(REPR_IS_REAL)
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#if (NG == 3)
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#undef _suNg_multiply
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#define _suNg_multiply(mc, mu, mp) \
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_Generic((mc), \
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suNg_vector : ({ _MVM_3x3C_SIMD_VEC((mc), (mu), (mp)); }),\
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default : ({ _suNg_multiply_default(mc, mu, mp); }))
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#undef _suNg_inverse_multiply
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#define _suNg_inverse_multiply(mc, mu, mp) \
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_Generic((mc), \
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suNg_vector : ({ _MTVM_3x3C_SIMD_VEC((mc), (mu), (mp)); }), \
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default : ({ _suNg_inverse_multiply_default(mc, mu, mp); }))
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#undef _suNg_double_multiply
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#define _suNg_double_multiply(mc, mc2, mu, mp, mp2) \
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_Generic((mc), \
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suNg_vector : ({ _double_MVM_3x3C_SIMD_VEC((mc), (mc2), (mu), (mp), (mp2)); }),\
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default : ({ _suNg_double_multiply_default(mc, mc2, mu, mp, mp2); }))
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#undef _suNg_double_inverse_multiply
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#define _suNg_double_inverse_multiply(mc, mc2, mu, mp, mp2) \
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_Generic((mc), \
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suNg_vector : ({ _double_MTVM_3x3C_SIMD_VEC((mc), (mc2), (mu), (mp), (mp2)); }),\
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default : ({ _suNg_double_inverse_multiply_default(mc, mc2, mu, mp, mp2); }))
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// clang-format on
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#endif
//(NG == 3)
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#endif
// SIMD_VECTOR_HIREP
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#endif
// SIMD_VECTOR_HIREP_H
logger.h
Simple output logging facility.
Include
Core
SIMD_vector_hirep.h
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